1. Field of the Invention
This invention relates to an improved simultaneous signal detector (SSD) circuit.
2. Description of Related Art
A simultaneous signal detector (SSD) circuit is used to detect the simultaneous or overlapping arrival of two separate signals. Simultaneous signal detectors are used in a variety of different applications, including both continuous wave and pulse radar receivers in order to recognize the second signal and permit the data represented by the second signal to be rejected or otherwise accounted for. In the instantaneous frequency measurement (IFM) module of a radio frequency (RF) radar receiver, for example, an active SSD signal means that the frequency data is invalid. An IFM module which includes a simultaneous signal detector is described, for example, in the article entitled "Microwave Receivers and Related Components," by James Tsui, Avionics Laboratory, Air Force Wright Aeronautical Laboratories, 1983.
Additional background on IFMs and SSDs is found in U.S. Pat. Nos. 4,633,516, 4,791,360, 4,963,816, 5,168,215, 4,426,648, 4,336,541, and 4,547,727. the first three of these patents discuss IFMs which do not include simultaneous signal detectors, the fourth listed patent discloses an SSD in combination with a signal strength detector, but in which the SSD output is not scaled by the signal strength (scaling is an important feature of the present invention, as discussed below), and the last three patents in the list disclose SSDs in which the difference signal is gated, as opposed to scaled, by the signal strength (these two patents are discussed in more detail below).
A typical simultaneous signal detector of the type used in an instantaneous frequency measurement module is shown in FIG. 5. In this detector, the input signal is separated into sum and difference signals by a square law detector 1, filter by a bandpass filter system 2 to reject the sum signal and any direct current signals, and sampled by a second detector 3, illustrated as a log detector, which outputs the difference signal to a first input of a comparison circuit 4, the second input of comparator 4 being a threshold voltage. The threshold is adjusted to cause an active output response from the comparator when the RF input signals are separated by a predetermined amplitude of, for example, from 0 to 6 dB. The comparator output is in binary from, with an active output marking a simultaneous signal (SS) condition, and an inactive output indicating a non-SS condition.
In the case of an instantaneous frequency detection module, the SSD output is usually combined with the output from the IFM in post processing. When an SS indication occurs, the post processing may, for example, mark the active SS-tagged IFM value as erroneous, and discard it from the evaluation. The system may then add signal processing elements in the RF path preceding the SSD/IFM such as tuned filters, to eliminate the SS condition, so as to improve the next IFM reading.
The conventional simultaneous signal detector, can only recognize signals with predetermined frequency separation criteria. An ideal output for a simultaneous signal detector would, in contrast, take into account the strength of the signals as follows:
1. The ideal SSD output is high (active) for: PA1 2. The ideal SSD output is low (inactive) for: PA1 1. When the threshold is set too high, the detector has the highest number of false negative indications, but correctly indicates the greatest number of legitimate non-SS conditions. This is illustrated in Table 2, in which "error.sub.13 N" is a false inactive SSD indication: PA1 2. When the threshold is set too low, the conventional SSD has the highest number of false positive indications, but correctly indicates all legitimate SS conditions. This is illustrated in Table 3, in which ERROR.sub.13 P represents a false inactive SS indication:
a. no RF input, PA2 b. weak inputs, defined as signals that are not significantly above circuit and thermal noise, and PA2 c. two simultaneous input signals with large input levels, where the input levels are "nearly identical" and the separation frequency of the simultaneous input signals is more than F.sub.BEAT MIN and less than F.sub.BEAT MAX. Typically, "nearly identical" refers to a difference of 6 dB or less; PA2 a. one input signal with significantly large input power, PA2 b. two simultaneous inputs whose frequency separation is less than F.sub.BEAT MIN or greater than F.sub.BEAT MAX, PA2 c. two simultaneous inputs where one signal is much stronger (typically, 6 dB or more) than the other.
Table 1, in which "X" is a true active indication and "-" is a true inactive SS indication, graphically illustrates the ideal simultaneous signal detector output:
TABLE 1 ______________________________________ SIGNAL 2 AMPLITUDE SIGNAL 1 None Weak Medium Strong ______________________________________ None X X -- -- Weak X X -- -- Medium -- -- X -- Strong -- -- -- X ______________________________________
Because the conventional SSD cannot take into account the respective strengths of the input signals, it is impossible to set an adequate threshold which properly takes into account all situations, and thus suffers the following disadvantages:
TABLE 2 ______________________________________ None Weak Medium Strong ______________________________________ None Error N Error N -- -- Weak Error N Error N -- -- Medium -- -- Error N -- Strong -- -- -- X ______________________________________
TABLE 3 ______________________________________ Signal 1 None Weak Medium Strong ______________________________________ None X X -- -- Weak X X Error P -- Medium -- Error P X Error P Strong -- -- Error P X ______________________________________
In general, in the type of conventional simultaneous signal detector exemplified by the detector illustrated in FIG. 5, there can be no single threshold setting in the prior art that is free of error. As will be explained in detail below, in order to solve this problem, the invention introduces a fitting parameter according to which the difference signal provided by the conventional detector illustrated in FIG. 1 is scaled before being input to the output comparator. In a preferred embodiment, the scaling parameter is the total input signal strength, which allows the preferred detector to take into account amplitude as well as frequency difference criteria.
This is in contrast to certain prior detectors, such as those disclosed in U.S. Pat. Nos. 4,336,541, 4,547,727, and 4,426,648, in which simultaneous signal detectors are described which gate the difference signal by a signal strength indicator (see FIG. 6, at 17 and FIG. 3, at 38, of the respective patents). As those skilled in the art will appreciate, gating is not equivalent to true scaling as is provided by the present invention, and the detectors disclosed in these patents will therefore not provide the advantages of the present invention.